A machine state register (MSR) is one of three process control registers present in the PowerPC processor architecture.

The implementation details of the machine state register will vary from model to model. Below are two representative implementations, the 32-bit Freescale e200z3 PowerPC core and the 64-bit IBM PowerPC.

While the machine state register found in the PowerPC architecture and the model-specific registers found in IA-32 and x86-64 architectures fulfill similar functions and the initialism "MSR" can refer to either, there are important differences that distinguish them. The machine state register, a single register, provides coarse-grained control over a small number of machine functions. In contrast, dozens to hundreds of model-specific registers exist on recent IA-32 and x86_64 architectures and provide a much finer granularity of both reporting and control of machine state. The term "machine state register" does not appear in Intel and AMD documentation; likewise "model-specific register" does not appear in IBM and Freescale documentation.

• UM0434 e200z3 PowerPC core reference manual, Rev. 1, May, 2007
• AIX 6.1 Assembler Language Reference
• PowerPC Operating Environment Architecture, Book III, v2.02, Jan 28 2005
• Freescale PowerPC Architecture Primer Rev 0.1, Jun 2005