Sandy_Bridge_(microarchitecture)

Sandy Bridge

Sandy Bridge

Intel processor microarchitecture


Sandy Bridge is the codename for Intel's 32 nm microarchitecture used in the second generation of the Intel Core processors (Core i7, i5, i3). The Sandy Bridge microarchitecture is the successor to Nehalem and Westmere microarchitecture. Intel demonstrated an A1 stepping Sandy Bridge processor in 2009 during Intel Developer Forum (IDF), and released first products based on the architecture in January 2011 under the Core brand.[2][3]

Quick Facts General information, Launched ...
Bottom view of a Core i7-2600K

Sandy Bridge is manufactured in the 32 nm process and has a soldered contact with the die and IHS (Integrated Heat Spreader), while Intel's subsequent generation Ivy Bridge uses a 22 nm die shrink and a TIM (Thermal Interface Material) between the die and the IHS.

Technology

Intel demonstrated a Sandy Bridge processor with A1 stepping at 2 GHz during the Intel Developer Forum in September 2009.[4]

Upgraded features from Nehalem include:

CPU

  • Intel Turbo Boost 2.0[5][6][7]
  • 32 KB data + 32 KB instruction L1 cache and 256 KB L2 cache per core[8]
  • Shared L3 cache which includes the processor graphics (LGA 1155)
  • 64-byte cache line size
  • New µOP cache, up to 1536-entry
  • Improved 3 integer ALU, 2 vector ALU and 2 AGU per core[9][10]
  • Two load/store operations per CPU cycle for each memory channel
  • Decoded micro-operation cache,[11] and enlarged, optimized branch predictor
  • Sandy Bridge retains the four branch predictors found in Nehalem: the branch target buffer (BTB), indirect branch target array, loop detector and renamed return stack buffer (RSB). Sandy Bridge has a single BTB that holds twice as many branch targets as the L1 and L2 BTBs in Nehalem.[12]
  • Improved performance for transcendental mathematics, AES encryption (AES instruction set), and SHA-1 hashing
  • 256-bit/cycle ring bus interconnect between cores, graphics, cache and System Agent Domain
  • Advanced Vector Extensions (AVX) 256-bit instruction set with wider vectors, new extensible syntax and rich functionality[13]
  • Up to 8 physical cores, or 16 logical cores through hyper-threading (From 6 core/12 thread)
  • Integration of the GMCH (integrated graphics and memory controller) and processor into a single die inside the processor package. In contrast, Sandy Bridge's predecessor, Clarkdale, has two separate dies (one for GMCH, one for processor) within the processor package. This tighter integration reduces memory latency even more.
  • A 14- to 19-stage instruction pipeline, depending on the micro-operation cache hit or miss[14]
  • Increased ROB to 168 entries (From 128)[15]
  • Larger Scheduler buffer (54-entry, up from 26-entry)
More information Cache, Page Size ...
All translation lookaside buffers (TLBs) are 4-way associative.[citation needed]

GPU

  • Intel Quick Sync Video, hardware support for video encoding and decoding
  • Integrated graphics is now integrated on the same die

I/O

  • Integrated PCIe Controller

Models and steppings

All Sandy Bridge processors with one, two, or four cores report the same CPUID model 0206A7h[18] and are closely related. The stepping number cannot be seen from the CPUID but only from the PCI configuration space. The later Sandy Bridge-E processors with up to eight cores and no graphics are using CPUIDs 0206D6h and 0206D7h.[19] Ivy Bridge CPUs all have CPUID 0306A9h to date, and are built in four different configurations differing in the number of cores, L3 cache and GPU execution units:

More information Die codename, CPUID ...

Performance

  • The average performance increase, according to IXBT Labs and Semi Accurate as well as many other benchmarking sites, at clock to clock is 11.3% compared to the Nehalem generation, which includes Bloomfield, Clarkdale, and Lynnfield processors.[20]
  • Around twice the integrated graphics performance compared to Clarkdale's (12 EUs comparison).

List of Sandy Bridge processors

1Processors featuring Intel's HD 3000 graphics are set in bold. Other processors feature HD 2000 graphics, HD graphics (Pentium and Celeron models) or no graphics core (Graphics Clock rate indicated by N/A).

  • This list may not contain all the Sandy Bridge processors released by Intel. A more complete listing can be found on Intel's website.

Desktop platform

[21] [22] [23]

More information Processor branding and model, Cores (threads) ...

Suffixes to denote:

  • K – Unlocked (adjustable CPU ratio up to 57 bins)
  • P – Versions clocked slightly higher than similar models, but with onboard-graphics deactivated
  • S – Performance-optimized lifestyle (low power with 65W TDP)
  • T – Power-optimized lifestyle (ultra low power with 35-45W TDP)
  • X – Extreme performance and unlocked (adjustable CPU ratio with no ratio limit)
  • C – Embedded/Communications - BGA packaging

NOTE: 3970X, 3960X, 3930K, and 3820 are actually of Sandy Bridge-E edition.

Server platform

All 1600/2600/4600-series models:

More information Model, Cores (threads) ...

Suffixes to denote:

  • L – Low power
  • W – Optimized for workstations
More information Socket, Model ...
More information Socket, Model ...

Mobile platform

  • Core i5-2515E and Core i7-2715QE processors have support for ECC memory and PCI express port bifurcation.
  • All mobile processors, except Celeron and Pentium, use the HD 3000 (12 EUs) iGPU.
More information Target segment, Processor branding and model ...

Suffixes to denote:

  • M – Mobile processors
    • UM – Ultra low power mobile (dual-core)
    • LM – Low power mobile (dual-core)
    • M – Dual-core mobile
    • QM – Quad-core mobile
    • XM – Quad-core extreme mobile (unlocked clock multiplier)
  • E – Embedded mobile processors
    • QE – Quad-core
    • LE – Lo power
    • UE – Ultra low poser

Cougar Point chipset flaw

On 31 January 2011, Intel issued a recall on all 67-series motherboards due to a flaw in the Cougar Point Chipset.[37] A hardware problem exists, in which the chipset's SATA II ports may fail over time, causing failure of connection to SATA devices, though data is not at risk.[38] Intel claims that this problem will affect only 5% of users over 3 years; however, heavier I/O workloads can exacerbate the problem. This hardware bug cannot be fixed by BIOS update.

Intel stopped production of flawed B2 stepping chipsets and began producing B3 stepping chipsets with the silicon fix. Shipping of these new chipsets started on 14 February 2011 and Intel estimated full recovery volume in April 2011.[39] Motherboard manufacturers (such as ASUS and Gigabyte Technology) and computer manufacturers (such as Dell and Hewlett-Packard) stopped selling products that involved the flawed chipset and offered support for affected customers. Options ranged from swapping for B3 motherboards to product refunds.[40][41]

Sandy Bridge processor sales were temporarily on hold, as one cannot use the CPU without a motherboard. However, processor release dates were not affected.[42] After two weeks, Intel continued shipping some chipsets, but manufacturers had to agree to a set of terms that will prevent customers from encountering the bug.[43]

Limitations

Overclocking

With Sandy Bridge, Intel has tied the speed of every bus (USB, SATA, PCI, PCIe, CPU cores, Uncore, memory etc.) to a single internal clock generator issuing the basic 100 MHz Base Clock (BClk).[44] With CPUs being multiplier locked, the only way to overclock is to increase the BClk, which can be raised by only 5–7% without other hardware components failing. As a work around, Intel made available K/X-series processors, which feature unlocked multipliers; with a multiplier cap of 57 for Sandy Bridge.[45] For the Sandy Bridge-E platform, there is alternative method known as the BClk ratio overclock.[46]

During IDF (Intel Developer Forum) 2010, Intel demonstrated an unknown Sandy Bridge CPU running stably overclocked at 4.9 GHz on air cooling.[47][48]

Chipset

Non-K edition CPUs can overclock up to four bins from its turbo multiplier. Refer here for chipset support.

vPro remote-control

Sandy and Ivy Bridge processors with vPro capability have security features that can remotely disable a PC or erase information from hard drives. This can be useful in the case of a lost or stolen PC. The commands can be received through 3G signals, Ethernet, or Internet connections. AES encryption acceleration will be available, which can be useful for video conferencing and VoIP applications.[49][50]

Intel Insider

Sandy and Ivy Bridge processors contain a DRM technology that some video streaming web sites rely on to restrict use of their content. Such web sites offer 1080p streaming to users with such CPUs and downgrade the quality for other users.[51]

Software development kit

With the introduction of the Sandy Bridge microarchitecture, Intel also introduced the Intel Data Plane Development Kit (Intel DPDK) to help developers of communications applications take advantage of the platform in packet processing applications, and network processors.[52]

Roadmap

Intel demonstrated the Haswell architecture in September 2011, released in 2013 as the successor to Sandy Bridge and Ivy Bridge.[53]

Fixes

In 2015, Microsoft released a microcode update for selected Sandy Bridge and Ivy Bridge CPUs for Windows 7 and up that addresses stability issues. However, the update negatively impacts Pentium G3258 and Core i3-4010U CPU models.[54][55][56]

See also


References

  1. Shvets, Gennadiy (September 26, 2012). "Intel discontinues second-generation Core i5 and i7 CPUs". CPU World. Retrieved 2020-07-29.
  2. "The Man Behind 'Sandy Bridge'". December 28, 2010. Archived from the original on December 2, 2011. Retrieved November 11, 2011.
  3. Brooke Crothers (December 15, 2010). "CES: First Intel next-gen laptops will be quad core". The Circuits Blog. CNET.com. Archived from the original on February 20, 2014. Retrieved November 11, 2011.
  4. "Archived copy" (PDF). Archived from the original (PDF) on 2019-01-01. Retrieved 2015-11-30.{{cite web}}: CS1 maint: archived copy as title (link)
  5. Chris Angelini (3 January 2011). "The System Agent And Turbo Boost 2.0". Tom's Hardware.
  6. Lal Shimpi, Anand (October 12, 2011). "The Bulldozer Review: AMD FX-8150 Tested". Anandtech.
  7. Lal Shimpi, Anand (2012-10-05). "Intel's Haswell Architecture Analyzed". AnandTech. Retrieved 2013-10-20.
  8. "Intel 64 and IA-32 Architectures Optimization Reference Manual" (PDF). Intel.com. Intel. Retrieved 2014-01-21.
  9. "Support for the Intel Core i5 Desktop Processor". Intel.com. Intel. 2012-02-22. Retrieved 2014-01-21.
  10. "Archived copy" (PDF). Archived from the original (PDF) on 2012-03-04. Retrieved 2011-12-21.{{cite web}}: CS1 maint: archived copy as title (link)
  11. Anand Lal Shimpi. "The Sandy Bridge Review: Intel Core i7-2600K, i5-2500K and Core i3-2100 Tested". anandtech.com. Retrieved 27 May 2015.
  12. "Intel's Sandy Bridge E-Series in Q4 2011". Tom's Hardware. 2011-02-11. Retrieved 2011-02-13.
  13. "Products (Formerly Sandy Bridge)". Official product web site. Intel. Retrieved November 11, 2011.
  14. "Intel® Core™ i7 Processor Family for the LGA-2011 Socket Datasheet, Volume 1" (PDF). Intel. p. 8: "The processor features up to 40 lanes of PCI Express links capable of up to 8.0 GT/s, and 4 lanes of DMI2/PCI Express 2.0 interface with a peak transfer rate of 5.0 GT/s. "
    p. 10: "Support for PCI Express 2.0 (5.0 GT/s), PCI Express (2.5 GT/s), and capable of up to PCI Express 8.0 GT/s. Up to 40 lanes of PCI Express interconnect for general purpose PCI Express devices capable of up to 8.0 GT/s speeds that are configurable for up to 10 independent ports."
  15. Angelini, Chris (November 14, 2011). "Intel Core i7-3960X Review: Sandy Bridge-E And X79 Express". Tom's Hardware. p. 2. It turns out that PCI Express 3.0 is, in fact, supported by Sandy Bridge-E (and the preview was updated to confirm 8 GT/s support the day after it went live). But because there weren't (and still aren't) any third-gen devices available yet, validating the feature was problematic. In fact, as you can see in the image below, Intel is still only officially guaranteeing that PCI Express 2.0 works, and probably will continue to do so until we see some hardware with a third-gen interface. Nevertheless, Intel's Core i7 datasheet confirms PCI Express 3.0 compliance, enabling up to 1 GB/s of bandwidth per lane, per direction.
  16. Shimpi, Anand Lal (December 22, 2011). "Sandy Bridge E & X79 PCIe 3.0: It Works". AnandTech.
  17. "Sandy Bridge-E and PCI-E 3.0". Intel Community Product Support.
  18. Shortly before Sandy Bridge-E's release,[25] Intel decided not to claim its PCIe 3.0 support, because the lack of any PCIe 3.0-certified hardware at the time of release would make it difficult to validate compliance. However the ability to operate in the 3.0 mode was preserved, which was confirmed by media and acknowledged by Intel.[26][27][28]
  19. Angelini, Chris (September 12, 2011). "Intel Core i7-3960X (Sandy Bridge-E) And X79 Platform Preview". Tom's Hardware. Retrieved November 14, 2011.
  20. Fuad Abazovic (January 6, 2012). "Intel Core i7-3820 comes on February 13". Fudzilla. Archived from the original on January 8, 2012. Retrieved January 6, 2012.
  21. "2nd Generation Intel Core i7 Processors". Ark.intel.com. Retrieved 2014-01-21.
  22. "Intel Mobile Celeron B820 - FF8062700848602". Cpu-world.com. Retrieved 2014-01-21.
  23. "Intel Mobile Celeron B815 - FF8062701159901". Cpu-world.com. Retrieved 2014-01-21.
  24. "Intel Mobile Celeron B720 - FF8062701084101". Cpu-world.com. Retrieved 2014-01-21.
  25. محمد رضا پناهی (8 February 2011). "Sandy Bridge، راه حل‌ها، بازار ایران". سخت افزار: مشاوره و بررسی گجت های دیجیتال. Retrieved 27 May 2015.
  26. "Intel Identifies Chipset Design Error, Implementing Solution" (Press release). Intel Corporation. January 31, 2011.
  27. "Intel to Ship Dual-core Sandy Bridge Chips on Feb. 20". PCWorld. 7 February 2011. Retrieved 27 May 2015.
  28. Anand Lal Shimpi (September 14, 2010). "Intel's Sandy Bridge Architecture Exposed". AnandTech. p. 8. Retrieved November 11, 2011.
  29. YouTube. youtube.com. Archived from the original on 2011-01-04. Retrieved 27 May 2015.
  30. Rick Merritt, Intel targets data plane with comms Soc, EE Times, February 2012
  31. Crothers, Brooke (September 14, 2011). "Haswell chip completes Ultrabook 'revolution'". The Circuits Blog. CNET.com. Retrieved November 11, 2011.

Further reading


Share this article:

This article uses material from the Wikipedia article Sandy_Bridge_(microarchitecture), and is written by contributors. Text is available under a CC BY-SA 4.0 International License; additional terms may apply. Images, videos and audio are available under their respective licenses.