IBM_Scalable_POWERparallel

IBM Scalable POWERparallel

IBM Scalable POWERparallel

Series of supercomputers by IBM


Scalable POWERparallel (SP) is a series of supercomputers from IBM. SP systems were part of the IBM RISC System/6000 (RS/6000) family, and were also called the RS/6000 SP. The first model, the SP1, was introduced in February 1993, and new models were introduced throughout the 1990s until the RS/6000 was succeeded by eServer pSeries in October 2000. The SP is a distributed memory system, consisting of multiple RS/6000-based nodes interconnected by an IBM-proprietary switch called the High Performance Switch (HPS). The nodes are clustered using software called PSSP, which is mainly written in Perl.

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Computer scientist Marc Snir was awarded the Seymour Cray Computer Engineering Award by the Institute of Electrical and Electronics Engineers in 2013 for his contributions to supercomputing, which included his work on the SP.[1]

Notable systems

Nodes

POWER1-based

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POWER2-based

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PowerPC 604-based

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P2SC-based

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POWER3-based

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See also


References

  1. "Marc Snir: 2013 Seymour Cray Award Recipient". IEEE Computer Society. Archived from the original on 2014-03-26.
  2. "SP2/512". TOP500 Supercomputer Sites. Retrieved 2 January 2019.
  3. "Seaborg - SP Power3 375 MHz 16 way". TOP500 Supercomputer Sites. Retrieved 2 January 2019.

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